Intricacies of a MIPS Stack Backtrace Implementation
David VomLehn of Cisco discusses the intricacies of a MIPS stack backtrace implementation. Intricacies of a MIPS Stack Backtrace Implementation Providing kernel backtraces on 32-bit MIPS family processors requires negotiation of treacherous ground, including branch delay slots, lack of frame pointers, partial register saves during exception processing, and more. Attempts at quick solutions leave many open holes; success requires a far more pedantic approach. The implementation discussed in this presentation uses code analysis to provide stack backtracing over exception frames at any stage of exception processing, using either MIPS ABI conventions (such as they are) or KALLSYMS information. The talk covers the most recent version of code that has been successfully deployed in the field for over four years. It has been presented as candidate for inclusion in the MIPS kernel tree. There will be some discussion of 64-bit coverage and other possible extensions, as well. David VomLehn, Cisco Presently employed at Cisco Systems, David VomLehn's first computer was the venerable Altair 8800, built from a kit. Alert readers will realize this implies he has dumped more than a few bits in the bucket. He developed hardware while a Physics major at Dartmouth College and afterwards, but has mostly resisted the allure of electrocution to focus on software. He has taken to heart the revolutionary slogan from George Orwell's work, "Digital Farm", "Applications Good, Kernel Better", and spent most of his career working as close to the hardware as possible without actually touching anything. This has meant working on UNIX and Linux kernels and other embedded applications. He has previously given talks at the SGI Developer's Forum, the Linux MIPS Summit, and the Embedded Linux Conference, Linux kernel work makes him happy.